The present invention relates to a power supply switch circuit, and more particularly, to a power supply switch circuit capable of suppressing generation of a rush current.
In recent years, portable electronic devices have been widely used. Under such circumstances, there is an increasing demand for driving portable electronic devices for a longer period of time. To satisfy this demand, it is important to reduce power consumption also in the technical field of semiconductor integrated circuits.
A power supply switch circuit is known as one of techniques for reducing power consumption. In the power supply switch circuit, a MOS transistor is used to reduce a leak current. In power supply switch circuit, however, power supply noise is undesirably caused due to a rush current generated upon turning on of a power supply switch.
Japanese Unexamined Patent Application Publication No. 2003-289245 discloses a technique for suppressing such power supply noise. In a semiconductor integrated circuit disclosed in Japanese Unexamined Patent Application Publication No. 2003-289245, a plurality of power supply terminals of a logic circuit block are connected to a real power supply line through a leak current cut-off circuit. In the case of activating the logic circuit block, the leak current cut-off circuit is used to electrically connect the power supply terminals of the logic circuit block to the real power supply line with a predetermined time delay. This configuration makes it possible to suppress a potential drop of the real power supply line which is caused upon activation of the logic circuit block, and to suppress power supply noise, thereby preventing a malfunction from occurring in other activated logic circuit blocks due to power supply noise.
Published Japanese Translation of PCT International Publication for Patent Application, No. 2008-532265 discloses a technique involving a power supply switch circuit for allowing each power domain to be enabled. In the technique disclosed in Published Japanese Translation of PCT International Publication for Patent Application, No. 2008-532265, enable signals for power supply switches are divided into groups and a dedicated control circuit for controlling a power supply switch operation is used to control the power supply switches to turn on at different timings.
FIG. 13 is a diagram for explaining the power supply switch circuit disclosed in Published Japanese Translation of PCT International Publication for Patent Application, No. 2008-532265. The power supply switch circuit shown in FIG. 13 includes a control circuit 110 and a power domain 102. The power domain 102 includes a plurality of power supply switch circuits 211 to 219 and domain circuit elements 220, 221, and 222. The power domain 102 also includes a first power supply bus 107, a local power supply bus 204, and a second power supply bus 108. Enable signals EN1 and EN2 are supplied from the control circuit 110 to the power domain 102.
As shown in FIG. 13, the power supply switch circuits 211 to 219 are arranged in a distributed manner over the power domain 102. The power supply switch circuits 211 to 219 connect the first power supply bus 107 and the local power supply bus 204 according to the enable signals. The enable signal EN1 is supplied to the power supply switch circuit 211. A path for the enable signal EN2 extends through the power supply switch circuits 212 to 219. The enable signal EN2 is supplied to each of the power supply switch circuits 212 to 219 while sequentially passing through the power supply switch circuits 212 to 219. This allows the power supply switch circuits 212 to 219 to sequentially turn on.
In the case of supplying power to the power domain, the control circuit 110 supplies the enable signal EN1 for turning on the power supply switch 211 to the power supply switch 211. At this time, only the power supply switch 211 turns on. After lapse of a predetermined period of time, the enable signal EN2 for turning on the power supply switch circuits 212 to 219 is supplied to each of the power supply switch circuits 212 to 219. At this time, the enable signal EN2 passes through the power supply switch circuits 212 to 219, so that the power supply switch circuits 212 to 219 sequentially turn on.
Thus, in the power supply switch circuit disclosed in Published Japanese Translation of PCT International Publication for Patent Application, No. 2008-532265, the power supply switch circuits 211 to 219 can be sequentially turned on at time intervals, which results in avoiding the generation of a large current when the first power supply bus 107 and the local power supply bus 204 are connected together.